1. Field of the Invention
The present disclosure relates to display technologies, and in particular to a driving circuit for a display panel.
2. The Related Arts
The demand for liquid crystal display (LCD) is continuously increasing, and people are asking for even greater resolution and better display quality. Therefore, how to improve LCD display quality becomes a major issue.
Existing LCDs are internally structurally as shown in FIG. 1, where a driving circuit for multiple sub-pixels of different component colors in a row of pixel units is depicted. The pixel units are denoted as S(1)˜S(2N), and each pixel unit includes three sub-pixels of three component colors. The sub-pixel of component color red is denoted as R, the sub-pixel of component color green is denoted as G, and the sub-pixel of component color blue is denoted as B. GATE(N) is the driving signal line providing driving signals for the sub-pixels in a row of pixel units. MUXR, MUXG, and MUXB are data signal lines providing data signals for R, G, and B sub-pixels, respectively. For existing multiplexer (MUX) driving structure, there are 1:2 MUX (2:4 MUX) type or 1:3 MUX (2:6 MUX) type. The driving structure shown in FIG. 1 is 1:3 MUX type.
Existing LCDs work as follows. When driving signal line GATE(N) is raised from low-level to high-level and as such provides voltage to the gates of MOS transistors connected to GATE(N). The MOS transistors are conducted and, after a preset period T1, the data signal line MUXR is raised to high level. Then, all thin film transistors (TFTs) that are connected to the R sub-pixels in a row of pixel units are conducted (i.e., T01, T04, T07, and T10 in FIG. 1 are conducted simultaneously), and all R sub-pixels corresponding to the row actuated by GATE(N) are charged. In other words, data signal line MUXR provides data signals to all R sub-pixels in a row of pixel units.
Similarly, after charging to all R sub-pixels corresponding to the row actuated by GATE(N) are done, data signal line MUXR is lowered to low level. After a preset period T2, the data signal line MUXG is raised to high level. Then, all TFTs that are connected to the G sub-pixels in a row of pixel units are conducted (i.e., T02, T05, T08, and T11 in FIG. 1 are conducted simultaneously), and all G sub-pixels corresponding to the row actuated by GATE(N) are charged.
After charging to all G sub-pixels corresponding to the row actuated by GATE(N) are done, data signal line MUXG is lowered to low level. After a preset period T3, the data signal line MUXB is raised to high level. Then, all TFTs that are connected to the B sub-pixels in a row of pixel units are conducted (i.e., T03, T06, T09, and T12 in FIG. 1 are conducted simultaneously), and all B sub-pixels corresponding to the row actuated by GATE(N) are charged.
After charging to all B sub-pixels corresponding to the row actuated by GATE(N) are done, data signal line MUXB is lowered to low level. After a preset period T4, the driving signal line GATE(N) is lowered to low level, and the cycle of a row's charging is completed. Repeating the above process then can complete the entire LCD's charging.
FIG. 2 is a timing sequence diagram showing the driving signal line GATE(N), data signal lines MUXR, MUXG, and MUXB of the LCD of FIG. 1. As illustrated, during a high-level cycle of GATE(N), MUXR, MUXG, and MUXB sequentially charge sub-pixels of corresponding component colors, respectively.
FIG. 3 is a waveform diagram showing the actual waveforms of the driving signal line GATE(N), data signal lines MUXR, MUXG, and MUXB of the LCD of FIG. 1. As illustrated, when the data signal line MUXR (or MUXG, or MUXB) starts charging sub-pixels of corresponding component color, liquid crystal module (LCM) instantaneously becomes a greater loading to the driving IC of the LCD. As such, glitches as shown in FIG. 3 appear in the output of the driving IC, i.e., the actual input signal to MOS transistors (Gate driver On Array, GOA). The actual input signal can be the clock (CK) signal, a frame start signal (STV), RESET signal, etc.